Named after the Greek Titan known as the "Lord of Light", Hyperion variants all implement the Half Quarter VGA peripheral.
Papilio Board | ZAP IDE Board Type | Bit File | Source Code | |
Arcade MegaWing | Papilio One 500K | ZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA on Arcade MegaWing | Download | Source Code |
LogicStart MegaWing | Papilio One 500K | ZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA on LogicStart MegaWing | Download | Source Code |
Any Board - Pin Select | Papilio One 500K | ZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA, Pin Select | Download | Source Code |
Arcade MegaWing | Papilio Pro LX9 | ZPUino on Papilio Pro (LX9), Hyperion with 8-bit HQVGA on Arcade MegaWing | Download | Source Code |
LogicStart MegaWing | Papilio Pro LX9 | ZPUino on Papilio Pro (LX9), Hyperion with 8-bit HQVGA on LogicStart MegaWing | Download | Source Code |
Name | WingSlot | Notes |
ZPUino_SPI | 0 | |
ZPUino_UART | 1 | |
zpuino_gpio | 2 | |
zpuino_timers | 3 | |
zpuino_sigmadelta | 5 | |
zpuino_spi | 6 | |
zpuino_crc16 | 7 | |
zpuino_vga | 9 | Hardwired to LogicStart and Arcade pins. Connected to PPS for Pin Select |
wb_char_ram_8x8_sp | 10 | Character ROM for VGA core |
zpuino_io_YM2149 | 11 |
These pins can be re-located to any desired pin on the Papilio. (:source:)
gpio_spp_data(0) <= sigmadelta_spp_data(0); -- PPS0 : SIGMADELTA DATA gpio_spp_data(1) <= timers_pwm(0); -- PPS1 : TIMER0 gpio_spp_data(2) <= timers_pwm(1); -- PPS2 : TIMER1 gpio_spp_data(3) <= spi2_mosi; -- PPS3 : USPI MOSI gpio_spp_data(4) <= spi2_sck; -- PPS4 : USPI SCK gpio_spp_data(5) <= sigmadelta_spp_data(1); -- PPS5 : SIGMADELTA1 DATA gpio_spp_data(6) <= uart2_tx; -- PPS6 : UART2 DATA gpio_spp_data(8) <= sid_audio; spi2_miso <= gpio_spp_read(0); -- PPS0 : USPI MISO uart2_rx <= gpio_spp_read(1); -- PPS0 : USPI MISO
(:sourceend:)
(:source:)
gpio_spp_data(0) <= sigmadelta_spp_data(0); -- PPS0 : SIGMADELTA DATA gpio_spp_data(1) <= timers_pwm(0); -- PPS1 : TIMER0 gpio_spp_data(2) <= timers_pwm(1); -- PPS2 : TIMER1 gpio_spp_data(3) <= spi2_mosi; -- PPS3 : USPI MOSI gpio_spp_data(4) <= spi2_sck; -- PPS4 : USPI SCK gpio_spp_data(5) <= sigmadelta_spp_data(1); -- PPS5 : SIGMADELTA1 DATA gpio_spp_data(6) <= uart2_tx; -- PPS6 : UART2 DATA gpio_spp_data(8) <= VGA_RED(3); gpio_spp_data(9) <= VGA_RED(2); gpio_spp_data(10) <= VGA_GREEN(3); gpio_spp_data(11) <= VGA_GREEN(2); gpio_spp_data(12) <= VGA_BLUE(3); gpio_spp_data(13) <= VGA_BLUE(2); gpio_spp_data(14) <= VGA_VSYNC; gpio_spp_data(15) <= VGA_HSYNC;
(:sourceend:)