Papilio Reference

Quick Links


Soft Processors

  • Hyperion - ZPUino variant with VGA adapter
  • Vanilla - Minimal peripherals for smallest size. Use this to start your own variants.

Basic Wishbone Peripherals
  • GPIO - General Purpose Input and Output
  • PPS - Peripheral Pin Select
  • Timers - Counter and PWM signals
  • UART - Serial Port
  • CRC16 - CRC16 engine with configurable polynomial
  • Interrupts - Internal interrupts
  • SigmaDelta DAC - Output analog waveforms
  • SPI - Synchronous Serial Port
  • AVR8 Shifty - AVR8 implementation with all peripherals and ability to shift pins
  • AVR8 ADC - AVR8 ADC library

Papilio Technical Docs

  • Papilio UCF Files - Papilio user constraint file (ucf) for use with Xilinx ISE projects.
  • Pin Mappings - Papilio chart shows what FPGA pins are connected to Wing locations.
  • Papilio Loader Help - Help page for Papilio Loader explains different modes and options.

Arduino Language Reference

Papilio Wishbone Peripherals

What are they?

FPGA's have all the power and flexibility in the world, but without good components to run on the FPGA it is just an empty canvas. The Papilio community is all about making it easy to DO things with FPGA's. A big part of our effort is to create interesting peripherals that can plug into a Soft Processor to create a System on Chip that can run on your Papilio FPGA. Papilio Wishbone Peripherals bring together multiple elements in order to provide end users with something they can use with the skills they already have. If you can program an Arduino then you can use Papilio Wishbone Peripherals!

Papilio Wishbone Peripherals are composed of the following:

Wishbone Peripheral

Wishbone peripherals provide the digital logic to implement interesting and useful things such as a C64 SID audio chip, a VGA adapter, or a serial port. They are written in Hardware Description Languages such as VHDL or Verilog. They are connected to a Soft Processor such as the ZPUino using a standard FPGA bus called the Wishbone Bus. Think of the Wishbone bus as a PCI bus that exists inside the FPGA and allows peripherals to be plugged into virtual slots. It is an Open Source standard that was developed at and supports many peripherals.


Arduino style libraries provide the interface that allows you to control the Wishbone Peripherals from your sketch. The Papilio has a specially modified version of the Arduino IDE that we call the ZAP IDE (ZPUino Arduino Papilio IDE). Included with ZAP is support for our Soft Processors, libraries to control our Wishbone Peripherals, and code examples.


Most Wishbone peripherals need a way to communicate with the outside world. For a C64 SID audio chip we need an audio jack, for VGA we need a VGA connector, and for a serial port we need a DB9 connector. The Papilio provides this necessary hardware in a flexible and easily extendable manner. Wings and MegaWings provide the hardware required by the various Papilio Wishbone Peripherals.

Papilio Wishbone Peripheral Reference

NameZPUino VariantLibrary

Papilio Pinouts

The following are pin out diagrams mapping the Papilio One headers to the Spartan 3E pin numbers and to the Arduino pin numbers. These charts come in handy when building a constraints file (UCF) for HDL projects and when building Arduino projects. (Click an image to download its PDF version)

These have been moved to a GitHub project and can be found here The files are being created in Illustrator and then exported as PDF files. Note that there are two branches: master and development. The latest work in progress will always be found on the development branch with the last good "release" being on master. Versions on master are being tagged for those that are curious to see the progression of the charts.


  • A big thank you to Kevin Lindsey for providing the original pin drawings.
  • And a big thanks to Atomsoft for the Arduino pin drawing


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