The plan is to use the T80 open source core: http://opencores.org/project,t80

Although it hasn't been updated in a while, it's reported to work fine (used in other projects) and seems rather precise -- even with the timings.

It compiles without problems in Xilinx ISE, fills only a small fraction of the fpga, and works perfectly, once you fixed inir/otir/etc. (according to patches from fpgaarcade)

  

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